1. Field of the Invention
The present invention relates to a method of producing a semiconductor device, such as an IC and LSI, and more particularly, to a method of forming a wiring of the semiconductor device, which method comprises a step of filling a via-hole (i.e., through hole, or contact hole) formed in an insulating film with a conductor (metal) plug. In the present specification, the term "wiring" means an interconnection comprising conductor patterned films and a conductor plug connecting same to form an electric circuit of the semiconductor device.
2. Description of the Related Art
Recently, a higher degree of integration of a semiconductor device and device miniaturization have lead to a need to make a size of a contact hole for interconnecting lower and upper conductor patterned films smaller. When the upper conductor film is deposited by a conventional deposition method, such as a vacuum vapor deposition method or a sputtering method, the deposited film causes a step coverage problem at the edge of the contact hole, since an amount of a conductor (metal) adhering to a side wall of the contact hole is reduced by a shadow effect. This problem can be solved by filling the contact hole with a conductor (metal) plug.
As a method of filling the contact hole with a conductor plug (i.e., a method of forming a conductor plug in the contact hole), an attempt has been made to melt a conductor (metal) film placed around the contact hole by using heat generated by a laser beam irradiation, to cause the film to flow into the contact hole. For example, the wiring of a semiconductor device is formed by using the laser irradiation technique in the following manner (cf. FIGS. 1a to 1f).
Referring to FIG. 1a, a semiconductor (silicon) substrate 1 is prepared and is selectively and thermally oxidized to form a field oxide (SiO.sub.2) film 2 on the substrate 1. Note, an unoxidized portion is not shown in FIG. 1a. Another insulating film 3 can be formed on the oxide film 2 by depositing an insulator (e.g., SiO.sub.2) in accordance with a chemical vapor deposition (CVD) process, and these insulating films form a field insulation film. Then, a lower conductor film 4 is formed over the insulating film 3 by depositing a conductive material (e.g., Al) by, e.g., a sputtering process, and the conductor film 4 is patterned in accordance with a circuit design by a suitable photolithography technique. Another insulating film 5 is formed on the conductor pattern film 4 and the insulating film 3, by depositing an insulator (e.g., PSG) in accordance with a CVD process. Note, in the present specification, the term "Al" means aluminum and alloys thereof (e.g., Al-Cu, Al-Si, Al-Si-Cu or the like).
As shown in FIG. 1b, the insulating film 5 is selectively etched by a photolithography technique using, e.g., a reactive ion-etching (RIE) process, to form a via-hole (i.e., a contact hole) 6 with the result that a portion of the lower conductor film 4 is exposed in the via-hole 6.
As shown in FIG. 1c, a conductor material (e.g., Al) is then deposited over the insulating film 5 and the via-hole 6 by, e.g., a sputtering process, to form a conductor film 7.
As shown in FIG. 1d, the conductor film 7 is then selectively etched by a suitable photolithography technique using, e.g., RIE, to leave a portion thereof within and near the via-hole 6. Namely, the via-hole 6 is filled with an amount of the conductor portion 7, and a portion of the insulating film 5 not covered by the film 7 is exposed.
The conductor pattern film 7 is melted with a laser irradiation, so that the melt 8 on the insulating film 5 flows into the via-hole 6. As the result, as shown in FIG. 1e, the via-hole 6 is filled with the conductor melt 8 consisting of the flowed melt and a present melt. The conductor melt 8 is rapidly cooled and solidified immediately after the laser irradiation is stopped, to this form a conductor plug 8.
Thereafter, as shown in FIG. 1f, another conductor (e.g., Al) is deposited over the insulating film 5 and the conductor plug 8 by, e.g., a sputtering process, to form an upper conductor film 9 coming into contact with the plug 8. The film 9 is patterned in accordance with a circuit design, by a suitable photolithography technique using, e.g., RIE, with the result that a wiring (interconnection) structure is obtained.
Another wiring of a semiconductor device is formed by using the laser irradiation technique in the following manner (cf. FIGS. 2a to 2c).
As shown in FIG. 2a, a semiconductor (silicon) substrate (wafer) 11 is prepared and is selectively and thermally oxidized to form an oxide (SiO.sub.2) film 12 on the substrate 11. Impurities (donor or acceptor) are selectively doped (introduced) into the substrate 11 by, e.g., an ion-implantation method, to form an impurity doped region (e.g., source region, drain region or base region) 13. A thin oxide (SiO.sub.2) film 14 is formed on the doped region 13, by a thermal oxidation method, and an insulating film 15 is formed over the oxide films 12 and 14 by depositing an insulator (e.g., PSG) by a CVD process. These oxide films and insulating film form a field insulation film 16. Then, the insulation film 16 (in this case, the insulating film 15 and the thin oxide film 14) is selectively etched by a photolithography technique using, e.g., a RIE process, to form a via-hole (i.e., a contact hole) 17 in which a portion of the doped region 13 is exposed. A conductor material (e.g., Al) is deposited over the insulating film 15 and the via-hole 17 by, e.g., a sputtering process, to form a conductor film, and thereafter, the conductor film is patterned by a photolithography technique to leave a conductor portion 18 within the via-hole 17 and on an insulating film portion surrounding the via-hole 17. The amount of the conductor film portion remaining on the insulating film portion is sufficient to fill the via-hole 17.
As shown in FIG. 2b, the conductor portion 18 is melted with a laser irradiation, to make the melt of the conductor portion 18 on the insulating film 15 flow into the via-hole 17 and combine the flowing melt with the melt of the conductor film portion within the via-hole 17, with the result that a conductor plug 19 is formed to thus fill the via-hole 17.
Thereafter, as shown in FIG. 2c, another conductor (e.g., Al) is deposited over the insulating film 15 and the conductor plug by, e.g., a sputtering process, to form another conductor film 20 coming into contact with the plug 19. The film 20 is patterned in accordance with a circuit design by a suitable photolithography technique using, e.g., RIE, with the result that a wiring (interconnection) structure is obtained.
The above-mentioned laser beam irradiation technique successfully fills a via-hole with a conductor plug, but has the following disadvantages.
In the former case shown in FIGS. 1a to 1f, since a portion (a relatively large area) of the insulating film 5 is not covered with the upper conductor pattern film 7, and the insulating film 5 is made of a material transparent (e.g., SiO.sub.2, PSG or the like) to a laser beam, the laser beam falls on the lower conductor pattern film 4 through the insulating film 5 and may melt the film 4, and as a result, a portion of the film 4 is destroyed and the predetermined circuit is damaged. In the latter case shown in FIGS. 2a to 2c, since a portion (a relatively large area) of the insulating film 15 is not covered by the conductor portion 18 and the insulation film 16 (insulating films 12, 14 and 15) is made of a material transparent (e.g., SiO.sub.2, PSG or the like) to a laser beam, the laser beam falls on and into the substrate 11 through the insulation film 16. When a PN junction interface between the doped region 13 and the semiconductor substrate 11 is irradiated with the laser beam, crystal defects (indicated with "x" in FIG. 2b) are generated at the junction, which increases a leakage current at the PN junction.
To eliminate these disadvantages, a person with normal skill in the art may think that an Al film can be formed over the whole surface and then irradiated with a laser beam, to thus fill a via-hole with an Al plug and intercept the laser beam. Nevertheless, it is impossible to control an amount of the Al melt flowing into the via-hole, and thus although some via-holes are suitably filled, other via-holes are insufficiently or excessively filled.